Dsp-controlled space-vector pwm current source converter for statcom application




















Two of the common VSC types are as below. Transformer basically acts as a coupling medium. In addition, Tranformer neutralize harmonics contained in the square waves produced by VSC. Harmonic Filter attenuates the harmonics and other high frequency components due to the VSC. In case of reactive power demand increases in the power system, STATCOM increases its output voltage V1 while maintain the phase difference between V1 and V2 to zero it shall be noted here that there will always exists small phase angle between V1 and V2 to cater for the leakage impedance drop in the interconnecting Transformer.

Again, if the voltage of power system increase due to load throw off, STATCOM will reduce its output voltage V1 and therefore will absorb reactive power to stabilize the voltage to normal value. But as we know every equipment has got their own limitations, so STATCOM must also have some limitation of supplying or absorbing reactive power. Yes, there exists a limitation and this limitation is imposed by the current carrying capacity of force commutated devices like IGBT, GTO etc. Therefore, if the operation of STATCOM reaches their limitation, it does not further increases or decreases its output voltage V1 rather it supplies or absorbs fixed reactive power equal to its limiting value at a fixed voltage and current and acts like constant current source.

Voltage stability is one of the biggest problems in power systems. Engineers and researchers are trying to consolidate a definition regarding to voltage stability, besides proposing techniques and methodologies for their analysis.

A zero-crossing detector was preferred mainly because of cost and availability of different designs. The output of the detector is connected to the external interrupt of the PIC C-T C2 microcontroller as a reference for the switching delay angles. In terms of instructions, this can be easily derived by using the system clock and the L. For a system clock of Kp the proportional coefficient, T the sampling period, k a 20 MHz and an instruction execution time of 0. Thus, since the timer is incremented at every instruction execution and generates interrupt when its value 4.

Just 3 , which will then generate new switching patterns to a quick comparison shows that the 2 EV managers and the control the bridge. The adopted methodology in PWM implemented in software and run on an Intel Pentium host operation will focus on the method pioneered by Patel and computer as illustrated by Figure 1. The controller has two Hoft [6] for both controlling the fundamental component and main functions to fulfil in order to prevent the system voltage eliminating low order harmonics depending on the number of from collapsing during a sudden variation in load, which can notches created in a square waveform running at a frequency be summarised as follows: of 50Hz.

The EV managers feature also programmable dead band units, which will be very useful in preventing current overshoot during the switching process. In this proposed design, two bridges will be controlled by only a Figure 1. Using a z-transfer 5. Masdi, N. Mariun, S. Bashi, A.

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