Consumer software for power management
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Fully integrated power manager. What IT pros have to say:. Boostraps Ent. Log in to Spiceworks. Here are four approaches to minimizing power consumption through software.
More than a century ago, American civil engineer Arthur Wellington coined a pithy, tongue-in-cheek definition of our profession that still rings true today: "Engineering is the art of doing that well with one dollar, which any bungler can do with two As embedded software engineers, we need to strike that balance between quality and efficiency.
To do so, we optimize our software's performance so that it can run on slower, less-expensive processors. We trim our software's memory footprint so we can use smaller, less-expensive memories. And increasingly, with many of us now writing software for handheld and wireless devices, we optimize our software's power consumption to extend the life of small, cheap power sources. The good news is that--whether you're creating the operating system, peripheral drivers, or application firmware--a variety of software design techniques can reduce power consumption.
In this article, we'll focus on four of these. Many of the latest embedded processors include run-time power modes that can be used to scale power consumption. The most common of these is idle mode, in which the instruction-executing portion of the processor core shuts down while all peripherals and interrupts remain powered and active.
Idle mode consumes substantially less power than when the processor is actively executing instructions. A key aspect of idle mode is that it requires little overhead to enter and exit, usually allowing it to be applied many times every millisecond. Any time the operating system detects that all threads are blocked-waiting on an interrupt, event, or timeout-it should place the processor into idle mode to conserve power.
Since any interrupt can wake the processor from idle mode, use of this mode enables software to intelligently wait for events in the system. For maximum power efficiency, however, this tool requires that we design our software carefully. We have all written code that polls a status register and waits until a flag is set. Perhaps we're checking a FIFO status flag in a serial port to see if data has been received.
Or maybe we're monitoring a dual-ported memory location to see if another processor or device in the system has written a variable, giving us control of a shared resource. While seemingly benign, polling a register in a loop represents a missed opportunity to extend battery life on handhelds.
The better solution is to use an external interrupt to signal when the status flag has changed. In a single-threaded software environment, you can then invoke the processor's idle mode to reduce power consumption until the actual event occurrs. When the interrupt occurs, the processor automatically wakes up and continues executing your code. Idle mode can even be used in cases where the event cannot be directly tied to an external interrupt.
In these situations, using a system timer to periodically wake the processor is still preferable to polling. For instance, if you are waiting for an event and know you can process it quickly enough as long as you check its status every millisecond, enable a 1ms timer and place the processor into idle mode.
Check the event's status every time the interrupt fires; if the status hasn't changed, you can return to idle mode immediately. This type of waiting mechanism is very common. The vast majority of today's PDAs and smart phones are powered by processors and operating systems that have idle-mode capabilities. In fact, most of these devices hop into and out of idle many times per second, awakened whenever a touchscreen tap, keypress, or timeout occurs.
Another technique to consider is event reduction. Whereas intelligent waiting enables the processor to enter its idle mode as often as possible, event reduction attempts to keep the processor in idle as long as possible. It is implemented by analyzing your code and system requirements to determine if you can alter the way you process interrupts.
For example, if you are working with a multitasking operating system that uses time-slicing to schedule threads, the operating system will typically set a timer interrupt to occur at the slice interval, which is often as small as 1ms. Assuming your code makes good use of intelligent waiting techniques, the operating system will frequently find opportunities to place the processor into idle mode, where it stays until it's awakened by an interrupt.
Of course, in this scenario, the interrupt most likely to awaken the processor is the timer interrupt itself. Even if all other threads are blocked-pending other interrupts, pending internal events, pending long delays-the timer interrupt will wake the processor from idle mode 1, times every second to run the scheduler.
Even if the scheduler determines that all threads are blocked and quickly returns the processor to idle mode, this frequent operation can waste considerable power. In these situations, the time-slice interrupt should be disabled when idle mode is entered, waking only when another interrupt occurs. Of course, it is usually inappropriate to disable the time-slice interrupt altogether.
While most blocked threads may be waiting-directly or indirectly-on external interrupts, some may have yielded to the operating system for a specific time period. Wizards and Configurators 4. The model number is not on the front of the unit, but can be found on a sticker on either the bottom or rear of your product.
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